The invention relates to apparatus for determining the Nth root of a number.
Special signal processing often requires the very rapid computation of the square root or the Nth root of a binary number. With the advent of customized read-only memories, it has become routine to address the read-only memory with the number for which the suare root or Nth root is to be obtained, the root being stored as the memory content. However, as the size of the number whose Nth root is to be determined increases, or the accuracy to which the Nth root is to be determined, the complexity of the hardware required increases due to many more memory storage locations and a larger number of possible addresses required. For example, each bit added to the word length of a number whose square root is to be determined causes the number of address combinations to double. This increase in complexity increases the cost of the Nth root processor, thereby adding to the overall costs of signal processing. The invention solves the above problems by providing a simplified and highly accurate Nth root processor.